楊孟潔具備基礎verilog能力 · Milestones · 敏捷攀樹協會 / 社群 / Digital Logic Design · GitLab

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Milestone started on Oct 27, 2022

楊孟潔具備基礎verilog能力

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Start date

Oct 27, 2022

From

Oct 27 2022

Due date

No due date (917 days elapsed)

2

Issues 2 New issue

Open: 0 Closed: 2

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Merge requests 0

Open: 0 Closed: 0 Merged: 0

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Reference: atca/community-edition/digital-logic-design%"楊孟潔具備基礎verilog能力"