Merge requests · 敏捷攀樹協會 / 社群 / Digital Logic Design · GitLab

Draft: Resolve "AND OR XOR XNOR NAND NOR NOT BUF" 1 of 8 checklist items completed

!24 · created Nov 03, 2022 by 晨知吳 kung sheng-jun具備基礎verilog能力
Logic Design Verilog Verilog硬體描述語言實務第二版
- Closed
- 1
updated Nov 20, 2022
Draft: Resolve "AND OR XOR XNOR NAND NOR NOT BUF"

!23 · created Nov 03, 2022 by 晨知吳高輝翔具備基礎verilog能力
Digital Design Verilog Verilog硬體描述語言實務第二版
- Closed
updated Nov 20, 2022
Draft: Resolve "上下數計數器"

!22 · created Nov 03, 2022 by 晨知吳 FPGA系統設計實務
Digital Communications Verilog Verilog硬體描述語言實務第二版 enhancement
- Closed
updated Nov 07, 2022
Resolve "AND OR XOR XNOR NAND NOR NOT BUF"

!21 · created Nov 01, 2022 by 晨知吳林軒霆具備基礎verilog能力
Verilog Verilog硬體描述語言實務第二版
- 1
updated Nov 20, 2022
Resolve "上下數計數器"

!20 · created Oct 31, 2022 by 晨知吳 FPGA系統設計實務
Digital Communications Verilog Verilog硬體描述語言實務第二版 enhancement
updated Nov 14, 2022
Draft: Resolve "AND OR XOR XNOR NAND NOR NOT BUF"

!19 · created Oct 28, 2022 by 晨知吳洪偉哲具備verilog能力
Digital Design Verilog Verilog硬體描述語言實務第二版
- Closed
updated Nov 20, 2022
Draft: Resolve "AND OR XOR XNOR NAND NOR NOT BUF"

!18 · created Oct 27, 2022 by 晨知吳吳琝貴具備基礎verilog能力
Digital Design Verilog Verilog硬體描述語言實務第二版
- Closed
updated Nov 20, 2022
Draft: Resolve "AND OR XOR XNOR NAND NOR NOT BUF"

!17 · created Oct 27, 2022 by 晨知吳林聖翔具備基礎verilog能力
Digital Design Verilog Verilog硬體描述語言實務第二版
- Closed
updated Nov 20, 2022
Draft: Resolve "AND OR XOR XNOR NAND NOR NOT BUF"

!16 · created Oct 27, 2022 by 晨知吳林軒霆具備基礎verilog能力
Digital Design Verilog Verilog硬體描述語言實務第二版
- Closed
updated Nov 02, 2022
Draft: Resolve "AND OR XOR XNOR NAND NOR NOT BUF"

!15 · created Oct 27, 2022 by 晨知吳課程規劃與設計
Digital Design Verilog Verilog硬體描述語言實務第二版
- Closed
updated Nov 20, 2022
Resolve "FPGA可程式邏輯閘陣列介紹"

!14 · created Sep 12, 2022 by 晨知吳著作
Digital Design Digital Systm Design Logic Design Verilog 硬體描述語言程式設計與模擬
- Merged
- 1
updated Dec 06, 2022
Resolve "訊號偵測器"

!13 · created Jun 13, 2022 by 晨知吳硬體描述語言程式設計與模擬
updated Jun 14, 2022
Resolve "紅綠燈"

!12 · created Jun 13, 2022 by 晨知吳專題製作
Digital Design To Do documentation enhancement 專題製作
updated Dec 06, 2022
Resolve "除頻器"

!11 · created May 24, 2022 by 晨知吳專題製作
Digital Design Doing Reference Verilog硬體描述語言實務第二版硬體描述語言程式設計與模擬
updated Jun 13, 2022
此提交將更新目錄

!10 · created Mar 22, 2022 by 晨知吳著作
Book Digital Design Doing documentation
updated Mar 22, 2022
Draft: Resolve "Reference Computer System Architecture Chapter 4"

!9 · created Oct 24, 2021 by 晨知吳計算機系統結構
CPU Computer System Architecture Digital Design Doing Reference 計算機系統結構
Resolve "Knowledge network database"

!8 · created Oct 24, 2021 by 晨知吳著作
- Merged
updated Jan 07, 2022
此提交將加入比較器描述

!7 · created Oct 22, 2021 by 晨知吳著作
Book Digital Design documentation
updated Jan 07, 2022
Resolve "Book Digital Design Combinational Logic Circuit"

!6 · created Sep 22, 2021 by 晨知吳著作
Book Digital Design documentation
updated Oct 22, 2021
Resolve "Book Digital Design Combinational Logic Circuit"

!5 · created Sep 22, 2021 by 晨知吳著作
Book Digital Design documentation
updated Sep 22, 2021

Prev
1
2
3
4
Next