Merge requests · 敏捷攀樹協會 / 社群 / Digital Logic Design · GitLab

Resolve "full adder markdown"

!32 · created Nov 10, 2022 by 晨知吳 kung sheng-jun具備基礎verilog能力 tempbranch
Digital Design Done Verilog Verilog硬體描述語言實務第二版 enhancement
updated Nov 24, 2022
Resolve "除頻器"

!11 · created May 24, 2022 by 晨知吳專題製作
Digital Design Doing Reference Verilog硬體描述語言實務第二版硬體描述語言程式設計與模擬
updated Jun 13, 2022
此提交將更新目錄

!10 · created Mar 22, 2022 by 晨知吳著作
Book Digital Design Doing documentation
updated Mar 22, 2022
此提交將加入比較器描述

!7 · created Oct 22, 2021 by 晨知吳著作
Book Digital Design documentation
updated Jan 07, 2022
Resolve "Book Digital Design Combinational Logic Circuit"

!6 · created Sep 22, 2021 by 晨知吳著作
Book Digital Design documentation
updated Oct 22, 2021
Resolve "Book Digital Design Combinational Logic Circuit"

!5 · created Sep 22, 2021 by 晨知吳著作
Book Digital Design documentation
updated Sep 22, 2021
如果採用，此提交將更新所有文件與檔案目錄，寫上新內容

!3 · created Jul 11, 2021 by 晨知吳著作
Book Computer System Architecture Digital Design documentation
updated Jul 11, 2021
Reference ARM9 to FPGA

!2 · created Jul 07, 2021 by 晨知吳軟核心處理器設計從ARM9到FPGA
Digital Design Reference 軟核心處理器設計從ARM9到FPGA
- Merged
- Approved
updated Jul 07, 2021

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